The principle of cache memory is primarily based on

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The principle of cache memory is primarily based on

Athe principle of locality of reference

Bthe heuristic 90-10 rule

Cthe fact that the entire program is not required at once

Dthe faster memories also tend to be costlier.

Akilesh Kharvi ? Dec 8 '2016 at 21:57

Answer:the principle of locality of reference

Explanation:

principle of cache memory primarily based on
Cache memory is a specially designed faster access but it has smaller memory area,so it is generally used to keep recently referenced data and data near recently referenced data.
When a program executes on a computer, most of the memory references are not made uniformly to a small number of locations. Here the Locality of the reference does matter.
Locality of Reference, also known as the Principle of Locality,the phenomenon of the same value or related storage locations being frequently accessed. Locality occurs in time(temporal locality) and in space (spatial locality).

Temporal Locality refers to the reuse of specific data and/or resources within relatively small time durations.

Spatial Locality refers to the use of data elements within relatively close storage locations. Sequential locality, a special case of spatial locality, occurs when data elements are arranged and accessed linearly, eg, traversing the elements in a one-dimensional array.

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In an absolute loading scheme, the assembler, in addition to

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In an absolute loading scheme, the assembler, in addition to its normal functions, should also perform

Aallocation

Breallocation

Clinking

Dloading

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The CPU is expected to handle the interrupt ( by executing

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The CPU is expected to handle the interrupt ( by executing the ISR )

Aas and when the interrupt is raised

Bat pre fixed time intervals

Cat the end of the current fetch cycle

Dat the end of the current execution cycle.

Akilesh Kharvi ? Dec 8 '2016 at 20:27

Answer : at the end of the current execution cycle.

Explanation:

After completing the current instruction(s), the CPU begins the interrupt respons

The general sequence for an interrupt is as follows:
-> Foreground code is running, interrupts are enabled
-> Interrupt event sends an interrupt request to the CPU
-> After completing the current instruction(s), the CPU begins the interrupt response
automatically saves current program counter
-> automatically saves some status (depending on CPU)
-> jump to correct interrupt service routine for this request
-> ISR code saves any registers and flags it will modify
-> ISR services the interrupt and re-arms it if necessary
-> ISR code restores any saved registers and flags
-> ISR executes a return-from-interrupt instruction or sequence
-> return-from-interrupt instruction restores automatically-saved status
-> return-from-interrupt instruction recovers saved program counter
-> Foreground code continues to run from the point it responded to the interrupt

Reference:http://www.scriptoriumdesigns.com/embedded/interrupts.php

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How many 32 x 1 RAM chips are needed to provide a memory cap

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How many 32 x 1 RAM chips are needed to provide a memory capacity of 256 kilo bytes ?

A128

B64

C32

D8

Akilesh Kharvi ? Dec 8 '2016 at 20:14

Answer : 64

Explanation:

We need 256 Kbytes, i.e., 256 x 1024 x 8 bits.
We have RAM chips of capacity 32 Kbits = 32 x 1024 bits.
\(=>\frac{256 \times 1024 \times 8}{32 \times 1024} = 64\)

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Match the implementations of Table X with the addressing

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Match the implementations of Table X with the addressing modes of Table Y :

Aa->III b->I c->II

Ba->II b->I c->III

Ca->III b->II c->I

Da->II b->III c->I

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