The principle of cache memory is primarily based on

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The principle of cache memory is primarily based on

Athe principle of locality of reference

Bthe heuristic 90-10 rule

Cthe fact that the entire program is not required at once

Dthe faster memories also tend to be costlier.

Akilesh Kharvi ? Dec 8 '2016 at 21:57

Answer:the principle of locality of reference

Explanation:

principle of cache memory primarily based on
Cache memory is a specially designed faster access but it has smaller memory area,so it is generally used to keep recently referenced data and data near recently referenced data.
When a program executes on a computer, most of the memory references are not made uniformly to a small number of locations. Here the Locality of the reference does matter.
Locality of Reference, also known as the Principle of Locality,the phenomenon of the same value or related storage locations being frequently accessed. Locality occurs in time(temporal locality) and in space (spatial locality).

Temporal Locality refers to the reuse of specific data and/or resources within relatively small time durations.

Spatial Locality refers to the use of data elements within relatively close storage locations. Sequential locality, a special case of spatial locality, occurs when data elements are arranged and accessed linearly, eg, traversing the elements in a one-dimensional array.

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In an absolute loading scheme, the assembler, in addition to

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In an absolute loading scheme, the assembler, in addition to its normal functions, should also perform

Aallocation

Breallocation

Clinking

Dloading

No answer description available for this question. Let us discuss.

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In a time sharing system, a process which is currently runni

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In a time sharing system, a process which is currently running, completed its allocated time slot. It now enters the

Asuspended state

Bblocked state

Cready state

Dterminated state

Akilesh Kharvi ? Dec 8 '2016 at 21:42

Answer: ready state

Explanation:

After completion of allocated time slot, process enters into the ready state.

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The CPU is expected to handle the interrupt ( by executing

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The CPU is expected to handle the interrupt ( by executing the ISR )

Aas and when the interrupt is raised

Bat pre fixed time intervals

Cat the end of the current fetch cycle

Dat the end of the current execution cycle.

Akilesh Kharvi ? Dec 8 '2016 at 20:27

Answer : at the end of the current execution cycle.

Explanation:

After completing the current instruction(s), the CPU begins the interrupt respons

The general sequence for an interrupt is as follows:
-> Foreground code is running, interrupts are enabled
-> Interrupt event sends an interrupt request to the CPU
-> After completing the current instruction(s), the CPU begins the interrupt response
automatically saves current program counter
-> automatically saves some status (depending on CPU)
-> jump to correct interrupt service routine for this request
-> ISR code saves any registers and flags it will modify
-> ISR services the interrupt and re-arms it if necessary
-> ISR code restores any saved registers and flags
-> ISR executes a return-from-interrupt instruction or sequence
-> return-from-interrupt instruction restores automatically-saved status
-> return-from-interrupt instruction recovers saved program counter
-> Foreground code continues to run from the point it responded to the interrupt

Reference:http://www.scriptoriumdesigns.com/embedded/interrupts.php

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When there is a large variation in the size of incoming jobs

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When there is a large variation in the size of incoming jobs, the best method of memory allocation is

Afirst fit

Bbest fit

Cworst fit

Drandom

Akilesh Kharvi ? Dec 8 '2016 at 20:4

Answer: worst fit

Explanation:

W O R S T - F I T
Worst-fit memory allocation is opposite to best-fit. It allocates free available block to the new job and it is not the best choice for an actual system. 
When there is arge variation in the size of incoming jobs, then we cannot apply first fit or best fit or random allocation

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